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Searched refs:DC_CMD_STATE_CONTROL_REG (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra_drm_mode.c	386 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 388 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 474 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 476 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 486 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 488 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 497 while (DC_READ(tegra_crtc, DC_CMD_STATE_CONTROL_REG) & 522 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 524 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, 700 DC_WRITE(tegra_crtc, DC_CMD_STATE_CONTROL_REG, [all...]
tegra_dcreg.h	`88 #define DC_CMD_STATE_CONTROL_REG 0x104`

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