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    Searched refs:DC_DISP_BLEND_CURSOR_CONTROL_DST_BLEND_FACTOR_SEL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra_dcreg.h	295 #define DC_DISP_BLEND_CURSOR_CONTROL_DST_BLEND_FACTOR_SEL __BITS(17,16)
tegra_drm_mode.c	459 cfg &= ~DC_DISP_BLEND_CURSOR_CONTROL_DST_BLEND_FACTOR_SEL; 460 cfg |= __SHIFTIN(2, DC_DISP_BLEND_CURSOR_CONTROL_DST_BLEND_FACTOR_SEL);

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