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    Searched refs:DC_HPD1_INT_CONTROL (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
amdgpu_irq_service_dce80.c 66 DC_HPD1_INT_CONTROL,
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_r600.c 875 tmp = RREG32(DC_HPD1_INT_CONTROL);
880 WREG32(DC_HPD1_INT_CONTROL, tmp);
3668 tmp = RREG32(DC_HPD1_INT_CONTROL) & DC_HPDx_INT_POLARITY;
3669 WREG32(DC_HPD1_INT_CONTROL, tmp);
3820 hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN;
3916 WREG32(DC_HPD1_INT_CONTROL, hpd1);
3987 tmp = RREG32(DC_HPD1_INT_CONTROL);
3989 WREG32(DC_HPD1_INT_CONTROL, tmp);
radeon_cik.c 6937 tmp = RREG32(DC_HPD1_INT_CONTROL) & DC_HPDx_INT_POLARITY;
6938 WREG32(DC_HPD1_INT_CONTROL, tmp);
7069 hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN);
7291 WREG32(DC_HPD1_INT_CONTROL, hpd1);
7392 tmp = RREG32(DC_HPD1_INT_CONTROL);
7394 WREG32(DC_HPD1_INT_CONTROL, tmp);
7422 tmp = RREG32(DC_HPD1_INT_CONTROL);
7424 WREG32(DC_HPD1_INT_CONTROL, tmp);
cikd.h 956 #define DC_HPD1_INT_CONTROL 0x6020
sid.h 882 #define DC_HPD1_INT_CONTROL 0x6020
evergreend.h 1348 #define DC_HPD1_INT_CONTROL 0x6020
r600d.h 858 #define DC_HPD1_INT_CONTROL 0x7d04
radeon_evergreen.c 48 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
radeon_si.c 174 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 886 #define DC_HPD1_INT_CONTROL 0x1808

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