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    Searched refs:DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
amdgpu_irq_service_dce80.c 102 .enable_mask = DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK,\
104 DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK,\
105 ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK\
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v8_0.c 305 tmp &= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;
2980 dc_hpd_int_cntl &= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;
2985 dc_hpd_int_cntl |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;
amdgpu_dce_v6_0.c 311 tmp &= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h 3899 #define DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK 0x00010000L
dce_8_0_sh_mask.h 6199 #define DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK 0x10000

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