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    Searched refs:DC_LOG_ERROR (Results 1 - 15 of 15) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/
amdgpu_irq_service.c 116 DC_LOG_ERROR("%s: cannot find irq info table entry for %d\n",
152 DC_LOG_ERROR("%s: cannot find irq info table entry for %d\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/include/
logger_interface.h 88 DC_LOG_ERROR(__VA_ARGS__); \
logger_types.h 35 #define DC_LOG_ERROR(...) DRM_ERROR(__VA_ARGS__)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/hdcp/
amdgpu_hdcp_msg.c 242 DC_LOG_ERROR("%s: KsvFifo Size(%d) is not a multiple of HDCP14_KSV_SIZE(%d)\n",
248 DC_LOG_ERROR("%s: KsvFifo Size(%d) is greater than HDCP14_MAX_KSV_FIFO_SIZE(%d)\n",
254 DC_LOG_ERROR("%s: Reading %d Ksv(s) from KsvFifo\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_timing_generator_v.c 621 DC_LOG_ERROR("Timing Sync not supported on underlay pipe\n");
629 DC_LOG_ERROR("Timing Sync not supported on underlay pipe\n");
637 DC_LOG_ERROR("Timing Sync not supported on underlay pipe\n");
644 DC_LOG_ERROR("Timing Sync not supported on underlay pipe\n");
651 DC_LOG_ERROR("Timing Sync not supported on underlay pipe\n");
amdgpu_dce110_hw_sequencer.c 803 DC_LOG_ERROR(
875 DC_LOG_ERROR(
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_clock_source.c 308 DC_LOG_ERROR(
369 DC_LOG_ERROR(
375 DC_LOG_ERROR(
513 DC_LOG_ERROR(
581 DC_LOG_ERROR(
613 DC_LOG_ERROR(
1284 DC_LOG_ERROR(
1289 DC_LOG_ERROR(
amdgpu_dce_link_encoder.c 852 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
951 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
983 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
1022 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
1061 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
1102 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/
amdgpu_irq_service_dce110.c 193 DC_LOG_ERROR("%s: called for non-implemented irq source\n",
201 DC_LOG_ERROR("%s: called for non-implemented irq source\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_link_encoder.c 845 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
945 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
984 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
1023 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
1068 DC_LOG_ERROR("%s: Failed to execute VBIOS command table!\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_link_encoder.c 237 DC_LOG_ERROR("%s: No supported link rate found %X!\n",
amdgpu_dcn20_resource.c 3337 DC_LOG_ERROR("%s: not valid soc bounding box/n", __func__);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_link_encoder.c 203 DC_LOG_ERROR("%s: No supported link rate found %X!\n",
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc_link.c 942 DC_LOG_ERROR("EDID checksum invalid.\n");
945 DC_LOG_ERROR("No EDID read.\n");
amdgpu_dc_link_dp.c 1051 DC_LOG_ERROR("%s: Link Training Error, could not get CR after %d tries. Possibly voltage swing issue",
3703 DC_LOG_ERROR("%s: Color space must be defined for test pattern", __func__);

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