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    Searched refs:DDst (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonSubtarget.cpp 419 MachineInstr *DDst = Dst->Succs[0].getSUnit()->getInstr();
421 for (unsigned OpNum = 0; OpNum < DDst->getNumOperands(); OpNum++) {
422 const MachineOperand &MO = DDst->getOperand(OpNum);
429 0, *DDst, UseIdx));
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 5035 // Source instruction is %DDst = VMOVD %DSrc, 14, %noreg (; implicits)
5042 // Change to a %DDst = VORRd %DSrc, %DSrc, 14, %noreg (; implicits)
5094 // Convert to %DDst = VSETLNi32 %DDst, %RSrc, Lane, 14, %noreg (; imps)
5095 // Again DDst may be undefined at the beginning of this instruction.
5118 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc;
5119 DDst = getCorrespondingDRegAndLane(TRI, DstReg, DstLane);
5129 if (DSrc == DDst) {
5131 // %DDst = VDUPLN32d %DDst, Lane, 14, %noreg (; implicits
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