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Searched refs:DMA_RB_CNTL (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_ni_dma.c	`171 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); 173 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl); 176 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); 178 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl); 220 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl); 251 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl \| DMA_RB_ENABLE);`
radeon_r600_dma.c	`106 u32 rb_cntl = RREG32(DMA_RB_CNTL); 112 WREG32(DMA_RB_CNTL, rb_cntl); 141 WREG32(DMA_RB_CNTL, rb_cntl); 175 WREG32(DMA_RB_CNTL, rb_cntl \| DMA_RB_ENABLE);`
radeon_ni.c	`1857 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); 1859 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); 1864 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); 1866 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);`
radeon_si.c	`3891 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); 3893 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); 3897 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); 3899 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp); 4058 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET); 4060 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp); 4062 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET); 4064 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);`
nid.h	`1306 #define DMA_RB_CNTL 0xd000`
radeon_r600.c	`1742 tmp = RREG32(DMA_RB_CNTL); 1744 WREG32(DMA_RB_CNTL, tmp); 1873 tmp = RREG32(DMA_RB_CNTL); 1875 WREG32(DMA_RB_CNTL, tmp);`
sid.h	`1817 #define DMA_RB_CNTL 0xd000`
radeon_evergreen.c	`3918 tmp = RREG32(DMA_RB_CNTL); 3920 WREG32(DMA_RB_CNTL, tmp); 4027 tmp = RREG32(DMA_RB_CNTL); 4029 WREG32(DMA_RB_CNTL, tmp);`
evergreend.h	`2620 #define DMA_RB_CNTL 0xd000`
r600d.h	`615 #define DMA_RB_CNTL 0xd000`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_dma.c	`126 rb_cntl = RREG32(DMA_RB_CNTL + sdma_offsets[i]); 128 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl); 155 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl); 183 WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl \| DMA_RB_ENABLE);`
sid.h	`1880 #define DMA_RB_CNTL 0x3400`

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