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Searched refs:DOMAIN1_PG_STATUS (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_hwseq.h	`200 SR(DOMAIN1_PG_STATUS), \ 255 SR(DOMAIN1_PG_STATUS), \ 313 SR(DOMAIN1_PG_STATUS), \ 381 uint32_t DOMAIN1_PG_STATUS; 562 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \ 618 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \ 666 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hwseq.c	`426 REG_WAIT(DOMAIN1_PG_STATUS,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer.c	`556 REG_WAIT(DOMAIN1_PG_STATUS,`

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