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    Searched refs:DOMAIN3_PG_CONFIG (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_hwseq.h 194 SR(DOMAIN3_PG_CONFIG), \
239 SR(DOMAIN3_PG_CONFIG), \
304 SR(DOMAIN3_PG_CONFIG), \
365 uint32_t DOMAIN3_PG_CONFIG;
551 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \
552 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh), \
587 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \
588 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh), \
649 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \
650 HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh),
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hwseq.c 208 REG_UPDATE(DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, force_on);
431 REG_UPDATE(DOMAIN3_PG_CONFIG,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer.c 500 REG_UPDATE(DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, force_on);
561 REG_UPDATE(DOMAIN3_PG_CONFIG,

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