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    Searched refs:DPG_PIPE_URGENT_LEVEL_CONTROL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_mem_input.h	111 uint32_t DPG_PIPE_URGENT_LEVEL_CONTROL; 220 SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_LOW_WATERMARK, mask_sh),\ 221 SFB(blk, DPG_PIPE_URGENT_LEVEL_CONTROL, URGENT_LEVEL_HIGH_WATERMARK, mask_sh),\
amdgpu_dce_mem_input.c	195 REG_SET_2(DPG_PIPE_URGENT_LEVEL_CONTROL, 0,

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