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    Searched refs:DP_AUX_CH_CTL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
handlers.c 832 if (reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_A)))
835 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B)))
838 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_C)))
841 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D)))
2900 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,
2902 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,
2904 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL,
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dp.c 1626 return DP_AUX_CH_CTL(aux_ch);
1629 return DP_AUX_CH_CTL(AUX_CH_B);
1658 return DP_AUX_CH_CTL(aux_ch);
1665 return DP_AUX_CH_CTL(AUX_CH_A);
1702 return DP_AUX_CH_CTL(aux_ch);
1705 return DP_AUX_CH_CTL(AUX_CH_A);
intel_display_power.c 564 val = I915_READ(DP_AUX_CH_CTL(aux_ch));
568 I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 5656 #define DP_AUX_CH_CTL(aux_ch) _MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL)

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