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    Searched refs:DP_CTL_REF_CLK_SEL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/imx/
imx51_dpllreg.h	38 #define DP_CTL_REF_CLK_SEL __BITS(8,9) 39 #define DP_CTL_REF_CLK_SEL_COSC __SHIFTIN(0x2, DP_CTL_REF_CLK_SEL) 40 #define DP_CTL_REF_CLK_SEL_FPM __SHIFTIN(0x3, DP_CTL_REF_CLK_SEL)
imx51_ccm.c	525 switch (dp_ctrl & DP_CTL_REF_CLK_SEL) {

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