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Searched refs:DP_DPHY_BS_SR_SWAP_CNTL (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_link_encoder.h	`76 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 86 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 92 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 99 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 105 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 153 uint32_t DP_DPHY_BS_SR_SWAP_CNTL;`
amdgpu_dce_link_encoder.c	`539 REG_UPDATE(DP_DPHY_BS_SR_SWAP_CNTL, DPHY_LOAD_BS_COUNT, 0x5);`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_link_encoder.h	`66 SRI(DP_DPHY_BS_SR_SWAP_CNTL, DP, id), \ 105 uint32_t DP_DPHY_BS_SR_SWAP_CNTL;`
amdgpu_dcn10_link_encoder.c	`527 REG_UPDATE(DP_DPHY_BS_SR_SWAP_CNTL, DPHY_LOAD_BS_COUNT, 0x5);`

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