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    Searched refs:DP_DPHY_CNTL (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_link_encoder.c 178 REG_UPDATE(DP_DPHY_CNTL, DPHY_FEC_EN, enable);
185 REG_UPDATE(DP_DPHY_CNTL, DPHY_FEC_READY_SHADOW, ready);
193 REG_GET(DP_DPHY_CNTL, DPHY_FEC_ACTIVE_STATUS, &active);
205 REG_GET(DP_DPHY_CNTL, DPHY_FEC_EN, &s->dphy_fec_en);
206 REG_GET(DP_DPHY_CNTL, DPHY_FEC_READY_SHADOW, &s->dphy_fec_ready_shadow);
207 REG_GET(DP_DPHY_CNTL, DPHY_FEC_ACTIVE_STATUS, &s->dphy_fec_active_status);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_link_encoder.h 56 SRI(DP_DPHY_CNTL, DP, id), \
136 uint32_t DP_DPHY_CNTL;
amdgpu_dce_link_encoder.c 148 REG_UPDATE(DP_DPHY_CNTL, DPHY_BYPASS, enable);
159 REG_UPDATE_4(DP_DPHY_CNTL,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_link_encoder.h 49 SRI(DP_DPHY_CNTL, DP, id), \
88 uint32_t DP_DPHY_CNTL;
amdgpu_dcn10_link_encoder.c 120 REG_UPDATE(DP_DPHY_CNTL, DPHY_BYPASS, enable);
131 REG_UPDATE_4(DP_DPHY_CNTL,

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