| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| amdgpu_dce_stream_encoder.c | 313 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
317 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
325 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
330 * DP_PIXEL_ENCODING is programmed to 0x4 */
333 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
344 REG_UPDATE(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING,
|
| dce_stream_encoder.h | 134 SE_SF(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\
222 SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\
406 uint8_t DP_PIXEL_ENCODING;
537 uint32_t DP_PIXEL_ENCODING;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_stream_encoder.c | 268 uint8_t dp_pixel_encoding = 0; local in function:enc1_stream_encoder_dp_set_stream_attribute
288 dp_pixel_encoding = DP_PIXEL_ENCODING_TYPE_YCBCR422;
291 dp_pixel_encoding = DP_PIXEL_ENCODING_TYPE_YCBCR444;
299 dp_pixel_encoding = DP_PIXEL_ENCODING_TYPE_Y_ONLY;
304 * DP_PIXEL_ENCODING is programmed to 0x4
308 dp_pixel_encoding = DP_PIXEL_ENCODING_TYPE_YCBCR420;
311 dp_pixel_encoding = DP_PIXEL_ENCODING_TYPE_RGB444;
350 DP_PIXEL_ENCODING, dp_pixel_encoding,
1574 DP_PIXEL_ENCODING, &hw_encoding
[all...] |
| dcn10_stream_encoder.h | 187 SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\
370 type DP_PIXEL_ENCODING;\
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/ |
| dce_11_0_enum.h | 2569 typedef enum DP_PIXEL_ENCODING {
2576 } DP_PIXEL_ENCODING;
|
| dce_11_2_enum.h | 2996 typedef enum DP_PIXEL_ENCODING {
3004 } DP_PIXEL_ENCODING;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| navi10_enum.h | 5698 * DP_PIXEL_ENCODING enum
5701 typedef enum DP_PIXEL_ENCODING {
5709 } DP_PIXEL_ENCODING;
|
| vega10_enum.h | 8055 * DP_PIXEL_ENCODING enum
8058 typedef enum DP_PIXEL_ENCODING {
8066 } DP_PIXEL_ENCODING;
|
