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Searched refs:DP_SEC_CNTL2 (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_stream_encoder.c	`230 REG_UPDATE(DP_SEC_CNTL2, DP_SEC_GSP7_PPS, 1); 342 REG_UPDATE(DP_SEC_CNTL2, DP_SEC_GSP7_PPS, 0);`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c	`773 REG_WAIT(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING, 777 REG_UPDATE(DP_SEC_CNTL2, DP_SEC_GSP4_SEND, 0); 780 REG_UPDATE(DP_SEC_CNTL2, DP_SEC_GSP4_SEND_ANY_LINE, 1); 839 REG_UPDATE(DP_SEC_CNTL2, DP_SEC_GSP4_SEND, 1);`
dcn10_stream_encoder.h	`86 SRI(DP_SEC_CNTL2, DP, id), \ 131 uint32_t DP_SEC_CNTL2;`

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