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Searched refs:DP_SEC_GSP0_ENABLE (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h	`156 SE_SF(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ 239 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ 430 uint8_t DP_SEC_GSP0_ENABLE; 561 uint32_t DP_SEC_GSP0_ENABLE;`
amdgpu_dce_stream_encoder.c	`883 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); 908 DP_SEC_GSP0_ENABLE, 0,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c	`742 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); 861 DP_SEC_GSP0_ENABLE, 0,`
dcn10_stream_encoder.h	`205 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ 389 type DP_SEC_GSP0_ENABLE;\`

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