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    Searched refs:DP_SEC_GSP3_ENABLE (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 160 SE_SF(DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\
243 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\
434 uint8_t DP_SEC_GSP3_ENABLE;
565 uint32_t DP_SEC_GSP3_ENABLE;
amdgpu_dce_stream_encoder.c 885 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, info_frame->hdrsmd.valid);
911 DP_SEC_GSP3_ENABLE, 0,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c 744 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, info_frame->hdrsmd.valid);
864 DP_SEC_GSP3_ENABLE, 0,
dcn10_stream_encoder.h 209 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\
393 type DP_SEC_GSP3_ENABLE;\

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