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    Searched refs:DP_SEC_GSP5_ENABLE (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 355 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
436 uint8_t DP_SEC_GSP5_ENABLE;
567 uint32_t DP_SEC_GSP5_ENABLE;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 283 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
395 type DP_SEC_GSP5_ENABLE;\
amdgpu_dcn10_stream_encoder.c 866 DP_SEC_GSP5_ENABLE, 0,

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