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    Searched refs:DP_SEC_GSP7_ENABLE (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_stream_encoder.c 318 // DP_SEC_GSP7_ENABLE, 1);
337 DP_SEC_GSP7_ENABLE, 1,
341 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, 0);
363 REG_GET(DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, &s->sec_gsp_pps_enable);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 357 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, mask_sh),\
438 uint8_t DP_SEC_GSP7_ENABLE;
569 uint32_t DP_SEC_GSP7_ENABLE;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 285 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, mask_sh),\
397 type DP_SEC_GSP7_ENABLE;\
amdgpu_dcn10_stream_encoder.c 868 DP_SEC_GSP7_ENABLE, 0,

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