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    Searched refs:DSCC_PPS_CONFIG3 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dsc.c 163 REG_GET(DSCC_PPS_CONFIG3, SLICE_WIDTH, &s->dsc_slice_width);
604 REG_SET_2(DSCC_PPS_CONFIG3, 0,
dcn20_dsc.h 46 SRI(DSCC_PPS_CONFIG3, DSCC, id),\
471 uint32_t DSCC_PPS_CONFIG3;

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