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Searched refs:DWCSATA_INTPR (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/powerpc/ibm4xx/dev/
dwcsatareg.h	`84 #define DWCSATA_INTPR 0x78 /* interrupt pending, write 1 clears */`
dwcsata.c	544 intpr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR); 765 intpr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR); 768 bus_space_write_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR, 802 intpr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR); 821 bus_space_write_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR, 940 bus_space_write_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR, 1003 bus_space_write_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR, 1070 bus_space_write_4(sc->sc_iot, sc->sc_ioh, DWCSATA_INTPR,

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