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Searched
refs:D_20
(Results
1 - 4
of
4
) sorted by relevancy
/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c
168
#define
D_20
(VX_12 + 1) /* Displacement starting at position 20 */
170
#define D_36 (
D_20
+ 1) /* Displacement starting at position 36 */
338
#define INSTR_RIS_RURDI 6, { R_8,I8_32,U4_12,
D_20
,B_16,0 } /* e.g. cib */
339
#define INSTR_RIS_R0RDI 6, { R_8,I8_32,
D_20
,B_16,0,0 } /* e.g. cibne */
340
#define INSTR_RIS_RURDU 6, { R_8,U8_32,U4_12,
D_20
,B_16,0 } /* e.g. clib */
341
#define INSTR_RIS_R0RDU 6, { R_8,U8_32,
D_20
,B_16,0,0 } /* e.g. clibne*/
410
#define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,
D_20
,B_16 } /* e.g. crb */
411
#define INSTR_RRS_RRRD0 6, { R_8,R_12,
D_20
,B_16,0 } /* e.g. crbne */
412
#define INSTR_RSE_RRRD 6, { R_8,R_12,
D_20
,B_16,0,0 } /* e.g. lmh */
413
#define INSTR_RSE_RERERD 6, { RE_8,RE_12,
D_20
,B_16,0,0 } /* e.g. mvclu *
[
all
...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c
168
#define
D_20
(VX_12 + 1) /* Displacement starting at position 20 */
170
#define D_36 (
D_20
+ 1) /* Displacement starting at position 36 */
338
#define INSTR_RIS_RURDI 6, { R_8,I8_32,U4_12,
D_20
,B_16,0 } /* e.g. cib */
339
#define INSTR_RIS_R0RDI 6, { R_8,I8_32,
D_20
,B_16,0,0 } /* e.g. cibne */
340
#define INSTR_RIS_RURDU 6, { R_8,U8_32,U4_12,
D_20
,B_16,0 } /* e.g. clib */
341
#define INSTR_RIS_R0RDU 6, { R_8,U8_32,
D_20
,B_16,0,0 } /* e.g. clibne*/
410
#define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,
D_20
,B_16 } /* e.g. crb */
411
#define INSTR_RRS_RRRD0 6, { R_8,R_12,
D_20
,B_16,0 } /* e.g. crbne */
412
#define INSTR_RSE_RRRD 6, { R_8,R_12,
D_20
,B_16,0,0 } /* e.g. lmh */
413
#define INSTR_RSE_RERERD 6, { RE_8,RE_12,
D_20
,B_16,0,0 } /* e.g. mvclu *
[
all
...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c
168
#define
D_20
(VX_12 + 1) /* Displacement starting at position 20 */
170
#define D_36 (
D_20
+ 1) /* Displacement starting at position 36 */
338
#define INSTR_RIS_RURDI 6, { R_8,I8_32,U4_12,
D_20
,B_16,0 } /* e.g. cib */
339
#define INSTR_RIS_R0RDI 6, { R_8,I8_32,
D_20
,B_16,0,0 } /* e.g. cibne */
340
#define INSTR_RIS_RURDU 6, { R_8,U8_32,U4_12,
D_20
,B_16,0 } /* e.g. clib */
341
#define INSTR_RIS_R0RDU 6, { R_8,U8_32,
D_20
,B_16,0,0 } /* e.g. clibne*/
410
#define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,
D_20
,B_16 } /* e.g. crb */
411
#define INSTR_RRS_RRRD0 6, { R_8,R_12,
D_20
,B_16,0 } /* e.g. crbne */
412
#define INSTR_RSE_RRRD 6, { R_8,R_12,
D_20
,B_16,0,0 } /* e.g. lmh */
413
#define INSTR_RSE_RERERD 6, { RE_8,RE_12,
D_20
,B_16,0,0 } /* e.g. mvclu *
[
all
...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c
166
#define
D_20
(VX_12 + 1) /* Displacement starting at position 20 */
168
#define D_36 (
D_20
+ 1) /* Displacement starting at position 36 */
348
#define INSTR_RIS_RURDI 6, { R_8,I8_32,U4_12,
D_20
,B_16,0 } /* e.g. cib */
349
#define INSTR_RIS_R0RDI 6, { R_8,I8_32,
D_20
,B_16,0,0 } /* e.g. cibne */
350
#define INSTR_RIS_RURDU 6, { R_8,U8_32,U4_12,
D_20
,B_16,0 } /* e.g. clib */
351
#define INSTR_RIS_R0RDU 6, { R_8,U8_32,
D_20
,B_16,0,0 } /* e.g. clibne*/
420
#define INSTR_RRS_RRRDU 6, { R_8,R_12,U4_32,
D_20
,B_16 } /* e.g. crb */
421
#define INSTR_RRS_RRRD0 6, { R_8,R_12,
D_20
,B_16,0 } /* e.g. crbne */
422
#define INSTR_RSE_RRRD 6, { R_8,R_12,
D_20
,B_16,0,0 } /* e.g. lmh */
423
#define INSTR_RSE_RERERD 6, { RE_8,RE_12,
D_20
,B_16,0,0 } /* e.g. mvclu *
[
all
...]
Completed in 27 milliseconds
Indexes created Sun Mar 01 05:31:48 UTC 2026