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  /src/external/apache2/llvm/dist/llvm/include/llvm/TableGen/
DirectiveEmitter.h 16 Def = DirectiveLanguages[0];
19 StringRef getName() const { return Def->getValueAsString("name"); }
22 return Def->getValueAsString("cppNamespace");
26 return Def->getValueAsString("directivePrefix");
30 return Def->getValueAsString("clausePrefix");
34 return Def->getValueAsString("clauseEnumSetClass");
38 return Def->getValueAsString("flangClauseBaseClass");
42 return Def->getValueAsBit("makeEnumAvailableInNamespace");
46 return Def->getValueAsBit("enableBitmaskEnumInNamespace");
60 const llvm::Record *Def;
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUGlobalISelUtils.cpp 18 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI);
19 if (!Def)
22 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) {
24 const MachineOperand &Op = Def->getOperand(1);
34 if (Def->getOpcode() == TargetOpcode::G_ADD) {
36 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset)))
37 return std::make_pair(Def->getOperand(1).getReg(), Offset);
40 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset))))
41 return std::make_pair(Def->getOperand(1).getReg(), Offset);
45 if (Def->getOpcode() == TargetOpcode::G_PTRTOINT)
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  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyLowerBrUnless.cpp 77 MachineInstr *Def = MRI.getVRegDef(Cond);
78 switch (Def->getOpcode()) {
81 Def->setDesc(TII.get(NE_I32));
85 Def->setDesc(TII.get(EQ_I32));
89 Def->setDesc(TII.get(LE_S_I32));
93 Def->setDesc(TII.get(LT_S_I32));
97 Def->setDesc(TII.get(GE_S_I32));
101 Def->setDesc(TII.get(GT_S_I32));
105 Def->setDesc(TII.get(LE_U_I32));
109 Def->setDesc(TII.get(LT_U_I32))
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WebAssemblyRegStackify.cpp 257 // Test whether Def is safe and profitable to rematerialize.
258 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA,
260 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA);
270 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg))
271 return Def;
273 // MRI doesn't know what the Def is. Try asking LIS.
276 return LIS.getInstructionFromIndex(ValNo->def);
281 // Test whether Reg, as defined at Def, has exactly one use. This is a
284 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI
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WebAssemblyRegisterInfo.cpp 96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg);
98 // the CONST_I32/64 happens to have exactly one def and one use. We
100 if (Def && Def->getOpcode() ==
102 MRI.hasOneNonDBGUse(Def->getOperand(0).getReg())) {
103 MachineOperand &ImmMO = Def->getOperand(1);
WebAssemblyPrepareForLiveIntervals.cpp 64 // Test whether the given register has an ARGUMENT def.
66 for (const auto &Def : MRI.def_instructions(Reg))
67 if (WebAssembly::isArgument(Def.getOpcode()))
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
ExegesisEmitter.cpp 52 void emitPfmCountersInfo(const Record &Def,
74 for (Record *Def : Records.getAllDerivedDefinitions("ProcPfmCounters")) {
78 Def->getValueAsListOfDefs("IssueCounters")) {
88 AddPfmCounterName(Def->getValueAsDef("CycleCounter"));
89 AddPfmCounterName(Def->getValueAsDef("UopsCounter"));
107 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def,
111 Def.getValueAsDef("CycleCounter")->getValueAsString("Counter");
113 Def.getValueAsDef("UopsCounter")->getValueAsString("Counter");
115 Def.getValueAsListOfDefs("IssueCounters").size();
117 OS << "\nstatic const PfmCountersInfo " << Target << Def.getName(
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WebAssemblyDisassemblerEmitter.cpp 33 auto &Def = *CGI.TheDef;
34 if (!Def.getValue("Inst"))
36 auto &Inst = *Def.getValueAsBitsInit("Inst");
55 Def.getValue("StackBased")->getValue()->getCastTo(StringRecTy::get());
73 Def.getValue("IsCanonical")->getValue()->getAsString() == "1";
  /src/external/apache2/llvm/dist/llvm/lib/WindowsManifest/
WindowsManifestMerger.cpp 127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) {
128 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) {
129 return Def;
155 if (xmlNsPtr Def = search(HRef, Node))
156 return Def;
157 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
ReachingDefAnalysis.cpp 1 //===---- ReachingDefAnalysis.cpp - Reaching Def Analysis ---*- C++ -*-----===//
105 // While processing the basic block, we kept `Def` relative to the start
163 int Def = Incoming[Unit];
164 if (Def == ReachingDefDefaultVal)
169 if (*Start >= Def)
172 // Update existing reaching def from predecessor to a more recent one.
173 *Start = Def;
175 // Insert new reaching def from predecessor.
176 MBBReachingDefs[MBBNumber][Unit].insert(Start, Def);
179 // Update reaching def at end of of BB. Keep in mind that these ar
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PeepholeOptimizer.cpp 186 /// Track Def -> Use info used for rewriting copies.
210 /// a def operand and a use operand that are tied. If there is a use
258 RegSubRegPair Def, RewriteMapTy &RewriteMap);
262 /// The recurrence cycle is formulated around 1) a def operand and its
263 /// tied use operand, or 2) a def operand and a use operand that is commutable
264 /// with another use operand which is tied to the def operand. In the latter
354 /// follows the use-def chain to find successive suitable sources.
356 /// def = COPY src.
361 /// def = COPY v2.sub0
363 /// Using a ValueTracker for def = COPY v2.sub0 will give the followin
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DetectDeadLanes.cpp 74 /// Given a bitmask \p UsedLanes for the used lanes on a def output of a
81 /// mask to the def and put the instruction into the worklist.
87 /// operand \p Def.
88 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
249 const MachineOperand &Def = MI.getOperand(0);
250 Register DefReg = Def.getReg();
280 // FIXME: PATCHPOINT instructions announce a Def that does not always exist,
284 const MachineOperand &Def = *MI.defs().begin();
285 Register DefReg = Def.getReg();
295 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes)
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MachineCopyPropagation.cpp 21 // - the COPY def is the only value that reaches OP
157 MCRegister Def = MI->getOperand(0).getReg().asMCReg();
160 // Remember Def is defined by the copy.
161 for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI)
164 // Remember source that's copied to Def. Once it's clobbered, then
169 if (!is_contained(Copy.DefRegs, Def))
170 Copy.DefRegs.push_back(Def);
281 bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
291 const MachineOperand &MODef, Register Def);
330 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def
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  /src/external/apache2/llvm/dist/llvm/lib/ToolDrivers/llvm-dlltool/
DlltoolDriver.cpp 131 Expected<COFFModuleDefinition> Def =
134 if (!Def) {
136 << errorToErrorCode(Def.takeError()).message();
142 Def->OutputFile = Arg->getValue();
144 if (Def->OutputFile.empty()) {
156 for (COFFShortExport& E : Def->Exports) {
164 for (COFFShortExport& E : Def->Exports) {
181 writeImportLibrary(Def->OutputFile, Path, Def->Exports, Machine, true))
  /src/external/apache2/llvm/dist/clang/lib/Format/
MacroExpander.cpp 61 Def.Name = Current->TokenText;
64 Def.ObjectLike = false;
71 return Def;
79 Def.Params.push_back(Current);
80 Def.ArgMap[Def.Params.back()->TokenText] = Def.Params.size() - 1;
103 Def.Body.push_back(Current);
106 Def.Body.push_back(Current);
118 Definition Def;
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  /src/external/apache2/llvm/dist/llvm/lib/IR/
Dominators.cpp 125 // dominates - Return true if Def dominates a use in User. This performs
126 // the special checks necessary if Def and User are in the same basic block.
127 // Note that Def doesn't dominate a use in Def itself!
130 const Instruction *Def = dyn_cast<Instruction>(DefV);
131 if (!Def) {
138 const BasicBlock *DefBB = Def->getParent();
140 // Any unreachable use is dominated, even if Def == User.
149 if (Def == User)
156 if (isa<InvokeInst>(Def) || isa<CallBrInst>(Def) || isa<PHINode>(User)
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  /src/sys/external/bsd/compiler_rt/dist/lib/fuzzer/
FuzzerExtFunctionsWeakAlias.cpp 22 RETURN_TYPE NAME##Def FUNC_SIG { \
26 RETURN_TYPE NAME FUNC_SIG __attribute__((weak, alias(#NAME "Def")));
28 #include "FuzzerExtFunctions.def"
47 this->NAME = GetFnPtr<decltype(::NAME)>(::NAME, ::NAME##Def, #NAME, WARN);
49 #include "FuzzerExtFunctions.def"
  /src/external/apache2/llvm/dist/llvm/lib/MCA/
Instruction.cpp 189 if (!all_of(getDefs(), [](const WriteState &Def) { return Def.isReady(); }))
206 [](const WriteState &Def) { return !Def.getDependentWrite(); }))
228 for (WriteState &Def : getDefs())
229 Def.cycleEvent();
237 for (WriteState &Def : getDefs())
238 Def.cycleEvent();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp 209 MachineRegisterInfo::def_instr_iterator Def =
211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
212 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0);
222 MachineRegisterInfo::def_instr_iterator Def =
224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");
225 MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1);
302 MachineRegisterInfo::def_instr_iterator Def =
304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!")
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  /src/external/apache2/llvm/dist/clang/lib/Lex/
MacroInfo.cpp 205 for (DefInfo Def = getDefinition(); Def; Def = Def.getPreviousDefinition()) {
206 if (Def.getLocation().isInvalid() || // For macros defined on the command line.
207 SM.isBeforeInTranslationUnit(Def.getLocation(), L))
208 return (!Def.isUndefined() ||
209 SM.isBeforeInTranslationUnit(L, Def.getUndefLocation()))
210 ? Def : DefInfo();
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
UnifyLoopExits.cpp 68 // SSA requirement that every def must dominate all its uses. For example,
109 // For each Def used outside the loop, create NewPhi in
110 // LoopExitBlock. NewPhi receives Def only along exiting blocks that
113 auto Def = II.first;
114 LLVM_DEBUG(dbgs() << "externally used: " << Def->getName() << "\n");
115 auto NewPhi = PHINode::Create(Def->getType(), Incoming.size(),
116 Def->getName() + ".moved",
120 if (Def->getParent() == In || DT.dominates(Def, In)) {
122 NewPhi->addIncoming(Def, In)
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PredicateInfo.cpp 103 // Only one of Def or Use will be set.
104 Value *Def = nullptr;
125 // number of instructions necessary to compute our def/use ordering.
142 // We want to put the def that will get used for a given set of phi uses,
144 // So we sort by edge, then by def.
149 bool isADef = A.Def;
150 bool isBDef = B.Def;
157 // For a phi use, or a non-materialized def, return the edge it represents.
159 if (!VD.Def && VD.U) {
163 // This is really a non-materialized def
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  /src/external/apache2/llvm/dist/llvm/lib/TableGen/
JSONBackend.cpp 76 if (auto *Def = dyn_cast<DefInit>(&I)) {
77 obj["kind"] = "def";
78 obj["def"] = Def->getDef()->getName();
126 // each def, but we also want to ensure we store an empty list for a
139 auto &Def = *D.second;
144 for (const RecordVal &RV : Def.getValues()) {
145 if (!Def.isTemplateArg(RV.getNameInit())) {
156 for (const auto &SuperPair : Def.getSuperClasses())
161 obj["!anonymous"] = Def.isAnonymous()
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  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
Localizer.h 55 /// Check if \p MOUse is used in the same basic block as \p Def.
58 /// block when to insert \p Def to have a local use.
59 static bool isLocalUse(MachineOperand &MOUse, const MachineInstr &Def,
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
VPlanValue.h 40 // This is the base class of the VPlan Def/Use graph, used for modeling the data
65 VPDef *Def;
67 VPValue(const unsigned char SC, Value *UV = nullptr, VPDef *Def = nullptr);
107 VPValue(Value *UV = nullptr, VPDef *Def = nullptr)
108 : VPValue(VPValueSC, UV, Def) {}
174 VPDef *getDef() { return Def; }
191 /// This class augments VPValue with operands which provide the inverse def-use
308 V->Def = nullptr;
338 assert(D->Def == this &&
342 D->Def = nullptr
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