HomeSort by: relevance | last modified time | path
    Searched refs:DefInstr (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineCombiner.cpp 152 MachineInstr *DefInstr = nullptr;
155 DefInstr = MRI->getUniqueVRegDef(MO.getReg());
157 if (DefInstr && DefInstr->isPHI())
158 DefInstr = nullptr;
159 return DefInstr;
196 MachineInstr *DefInstr = InsInstrs[II->second];
197 assert(DefInstr &&
200 int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg());
202 LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx
    [all...]
LiveRangeShrink.cpp 200 MachineInstr &DefInstr = *MRI.def_instr_begin(Reg);
201 if (!DefInstr.isCopy())
203 Insert = FindDominatedInstruction(DefInstr, Insert, IOM);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILowerControlFlow.cpp 660 MachineInstr *DefInstr = MRI->getVRegDef(InputReg);
661 assert(DefInstr && DefInstr->isCopy());
662 if (DefInstr->getParent() == MBB) {
663 if (DefInstr != FirstMI) {
666 DefInstr->removeFromParent();
667 MBB->insert(FirstMI, DefInstr);
669 LIS->handleMove(*DefInstr);
AMDGPUMachineCFGStructurizer.cpp 327 MachineInstr *DefInstr, const MachineRegisterInfo *MRI,
331 MachineInstr *DefInstr,
675 MachineInstr *DefInstr,
702 if ((&(*MII)) == DefInstr) {
715 MachineInstr *DefInstr,
1957 MachineInstr *DefInstr = getDefInstr(SourceReg);
1958 if (DefInstr->isPHI() && DefInstr->getParent() == CodeBB && IsSingleBB) {
1967 storePHILinearizationInfoDest(DestReg, *DefInstr);
1971 DefInstr->eraseFromParent()
    [all...]
SIPeepholeSDWA.cpp 291 MachineInstr *DefInstr = MRI->getUniqueVRegDef(Reg->getReg());
292 if (!DefInstr)
295 for (auto &DefMO : DefInstr->defs()) {

Completed in 29 milliseconds