| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| GISelKnownBits.cpp | 58 APInt DemandedElts =
60 return getKnownBits(R, DemandedElts);
63 KnownBits GISelKnownBits::getKnownBits(Register R, const APInt &DemandedElts,
69 computeKnownBitsImpl(R, Known, DemandedElts);
100 const APInt &DemandedElts,
103 computeKnownBitsImpl(Src1, Known, DemandedElts, Depth);
110 computeKnownBitsImpl(Src0, Known2, DemandedElts, Depth);
117 const APInt &DemandedElts,
154 if (!DemandedElts)
161 TL.computeKnownBitsForTargetInstr(*this, R, Known, DemandedElts, MRI
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| GISelKnownBits.h | 39 const APInt &DemandedElts,
43 const APInt &DemandedElts, unsigned Depth = 0);
58 const APInt &DemandedElts,
61 unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
67 KnownBits getKnownBits(Register R, const APInt &DemandedElts,
75 /// \return true if 'V & Mask' is known to be zero in DemandedElts. We use
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 1071 /// DemandedElts contains the set of elements that are actually used by the
1074 /// to true, DemandedElts refers to the union of sets of elements that are
1081 APInt DemandedElts,
1092 assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!");
1100 if (DemandedElts.isNullValue()) { // If nothing is demanded, provide poison.
1110 if (DemandedElts.isAllOnesValue())
1117 if (!DemandedElts[i]) { // If not demanded, set to poison.
1153 DemandedElts = EltMask;
1202 simplifyAndSetOp(I, i, DemandedElts, UndefEltsOp)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| ValueTracking.cpp | 157 const APInt &DemandedElts,
168 if (DemandedElts.isNullValue())
176 if (!DemandedElts[i])
194 static void computeKnownBits(const Value *V, const APInt &DemandedElts,
199 // FIXME: We currently have no way to represent the DemandedElts of a scalable
207 APInt DemandedElts =
209 computeKnownBits(V, DemandedElts, Known, Depth, Q);
221 void llvm::computeKnownBits(const Value *V, const APInt &DemandedElts,
226 ::computeKnownBits(V, DemandedElts, Known, Depth,
230 static KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | 2375 APInt DemandedElts = VT.isVector()
2378 return GetDemandedBits(V, DemandedBits, DemandedElts);
2383 /// DemandedElts.
2387 const APInt &DemandedElts) {
2390 return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts,
2437 /// DemandedElts. We use this predicate to simplify operations downstream.
2440 const APInt &DemandedElts,
2442 return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Depth).Zero);
2445 /// Return true if the DemandedElts of the vector Op are all zero. We
2447 bool SelectionDAG::MaskedElementsAreZero(SDValue Op, const APInt &DemandedElts,
[all...] |
| TargetLowering.cpp | 505 const APInt &DemandedElts,
511 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO))
548 APInt DemandedElts = VT.isVector()
551 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO);
632 APInt DemandedElts = VT.isVector()
635 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth,
642 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
653 if (DemandedBits == 0 || DemandedElts == 0)
656 unsigned NumElts = DemandedElts.getBitWidth();
671 Src, DemandedBits, DemandedElts, DAG, Depth + 1)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InstCombineIntrinsic.cpp | 934 APInt DemandedElts = APInt::getLowBitsSet(Width, DemandedWidth);
935 return IC.SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts);
1766 APInt DemandedElts = DemandedMask.zextOrTrunc(ArgWidth);
1768 if (DemandedElts.isNullValue()) {
1782 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
1794 // use Arg0 if DemandedElts[0] is clear like we do for other intrinsics.
1796 if (!DemandedElts[0]) {
1802 DemandedElts = 1;
1803 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts);
1812 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts)
[all...] |
| X86TargetTransformInfo.h | 144 const APInt &DemandedElts,
169 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
|
| X86ISelLowering.h | 1072 const APInt &DemandedElts,
1079 const APInt &DemandedElts,
1085 const APInt &DemandedElts,
1090 const APInt &DemandedElts,
1097 const APInt &DemandedElts,
1104 const APInt &DemandedElts,
1110 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUInstCombineIntrinsic.cpp | 914 APInt DemandedElts,
931 const unsigned ActiveBits = DemandedElts.getActiveBits();
932 const unsigned UnusedComponentsAtFront = DemandedElts.countTrailingZeros();
937 DemandedElts = (1 << ActiveBits) - 1;
967 DemandedElts &= ~((1 << UnusedComponentsAtFront) - 1);
984 DemandedElts &= (1 << countPopulation(DMaskVal)) - 1;
991 if (!!DemandedElts[OrigLoadIdx])
1001 unsigned NewNumElts = DemandedElts.countPopulation();
1005 if (NewNumElts >= VWidth && DemandedElts.isMask()) {
1033 DemandedElts.countTrailingZeros())
[all...] |
| AMDGPUISelLowering.h | 254 const APInt &DemandedElts,
258 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const APInt &DemandedElts,
264 const APInt &DemandedElts,
|
| AMDGPUTargetTransformInfo.h | 195 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.h | 108 const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.h | 325 const APInt &DemandedElts,
330 const APInt &DemandedElts,
334 const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/InstCombine/ |
| InstCombiner.h | 386 IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
519 SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &UndefElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonTargetTransformInfo.cpp | 126 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract) {
127 return BaseT::getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
|
| HexagonTargetTransformInfo.h | 108 const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 66 const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 206 const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 1683 /// by DemandedElts. If so, return the simpler operand, otherwise return a
1689 const APInt &DemandedElts);
1701 /// Return true if 'Op & Mask' is known to be zero in DemandedElts. We
1705 const APInt &DemandedElts, unsigned Depth = 0) const;
1707 /// Return true if the DemandedElts of the vector Op are all zero. We
1709 bool MaskedElementsAreZero(SDValue Op, const APInt &DemandedElts,
1725 /// them in Known. The DemandedElts argument allows us to only collect the
1729 KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts,
1763 /// to each other, so we return 3. The DemandedElts argument allows
1767 unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
[all...] |
| TargetLowering.h | 3297 const APInt &DemandedElts,
3309 const APInt &DemandedElts,
3334 const APInt &DemandedElts, KnownBits &Known,
3351 /// through" ops that don't contribute to the DemandedBits/DemandedElts -
3354 const APInt &DemandedElts,
3367 const APInt &DemandedElts,
3371 /// Look at Vector Op. At this point, we know that only the DemandedElts
3392 bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts,
3397 /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
3402 const APInt &DemandedElts,
[all...] |
| BasicTTIImpl.h | 589 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
594 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
661 const APInt &DemandedElts,
667 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
673 if (!DemandedElts[i])
684 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
689 APInt DemandedElts = APInt::getAllOnesValue(Ty->getNumElements());
690 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 569 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
733 const APInt &DemandedElts,
1491 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
1537 const APInt &DemandedElts,
1835 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
1840 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
1942 const APInt &DemandedElts,
1944 return Impl.getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
|
| ValueTracking.h | 74 void computeKnownBits(const Value *V, const APInt &DemandedElts,
91 KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 542 const APInt &DemandedElts,
548 const APInt &DemandedElts,
|
