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    Searched refs:Dest0 (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILoadStoreOptimizer.cpp 1056 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst);
1115 .add(*Dest0) // Copy to same destination including flags and sub reg.
1251 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1255 .add(*Dest0) // Copy to same destination including flags and sub reg.
1301 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst);
1305 .add(*Dest0) // Copy to same destination including flags and sub reg.
1362 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1366 .add(*Dest0) // Copy to same destination including flags and sub reg.
1428 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata);
1432 .add(*Dest0) // Copy to same destination including flags and sub reg
    [all...]
SIInstrInfo.cpp 5921 MachineOperand &Dest0 = Inst.getOperand(0);
5930 RI.getEquivalentVGPRClass(MRI.getRegClass(Dest0.getReg()));
5942 MRI.replaceRegWith(Dest0.getReg(), DestReg);
SIISelLowering.cpp 3888 MachineOperand &Dest0 = MI.getOperand(0);
3896 BuildMI(*BB, MI, DL, TII->get(Opc), Dest0.getReg()).add(Src0).add(Src1);

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