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    Searched refs:DispatchIDReg (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCallLowering.cpp 472 Register DispatchIDReg = Info.addDispatchID(TRI);
473 MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass);
474 CCInfo.AllocateReg(DispatchIDReg);
SIISelLowering.cpp 2054 Register DispatchIDReg = Info.addDispatchID(TRI);
2055 MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass);
2056 CCInfo.AllocateReg(DispatchIDReg);

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