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    Searched refs:Dst1 (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsDelaySlotFiller.cpp 880 [&](const MachineBasicBlock *Dst0, const MachineBasicBlock *Dst1) {
882 Prob.getEdgeProbability(&B, Dst1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIFoldOperands.cpp 268 MachineOperand &Dst1 = MI->getOperand(1);
269 assert(Dst0.isDef() && Dst1.isDef());
271 bool HaveNonDbgCarryUse = !MRI.use_nodbg_empty(Dst1.getReg());
279 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), Dst1.getReg())
AMDGPUInstructionSelector.cpp 864 Register Dst1 = MI.getOperand(1).getReg();
887 .addDef(Dst1)
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
LegalizerHelper.cpp 6466 Register Dst1 = MI.getOperand(1).getReg();
6472 LLT BoolTy = MRI.getType(Dst1);
6494 MIRBuilder.buildXor(Dst1, ConditionRHS, ResultLowerThanLHS);

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