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    Searched refs:DstLane (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64PostLegalizerLowering.cpp 439 int DstLane;
440 std::tie(DstIsLeft, DstLane) = *DstIsLeftAndDstLane;
446 int SrcLane = ShuffleMask[DstLane];
452 MatchInfo = std::make_tuple(DstVec, DstLane, SrcVec, SrcLane);
463 int DstLane, SrcLane;
464 std::tie(DstVec, DstLane, SrcVec, SrcLane) = MatchInfo;
467 auto DstCst = Builder.buildConstant(LLT::scalar(64), DstLane);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 5118 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc;
5119 DDst = getCorrespondingDRegAndLane(TRI, DstReg, DstLane);
5166 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst;
5170 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst;
5176 if (SrcLane == DstLane)
5184 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst;
5188 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst;
5194 if (SrcLane != DstLane)
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 15908 int DstLane = i / NumEltsPerLane;
15913 int DstSubStart = DstLane * NumSublanesPerLane;
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