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Searched refs:EECD_SK (Results 1 - 5 of 5) sorted by relevancy

/src/sys/arch/sandpoint/stand/altboot/
wm.c	`312 v = CSR_READ(l, WMREG_EECD) & ~(EECD_SK \| EECD_DI); 326 CSR_WRITE(l, WMREG_EECD, v \| EECD_SK); 336 CSR_WRITE(l, WMREG_EECD, v \| EECD_SK);`
/src/sys/dev/pci/
if_dgereg.h	`234 #define EECD_SK 0x01`
if_dge.c	`2326 reg = CSR_READ(sc, DGE_EECD) & ~(EECD_SK \| EECD_DI \| EECD_CS); 2362 reg = CSR_READ(sc, DGE_EECD) & ~(EECD_DI \| EECD_SK); 2368 CSR_WRITE(sc, DGE_EECD, reg \| EECD_SK); 2382 reg = CSR_READ(sc, DGE_EECD) & ~(EECD_DI \| EECD_DO \| EECD_SK); 2384 CSR_WRITE(sc, DGE_EECD, reg \| EECD_SK); /* Raise clock */`
if_wmreg.h	`494 #define EECD_SK __BIT(0) /* clock */`
if_wm.c	`14191 CSR_WRITE(sc, WMREG_EECD, reg \| EECD_SK); 14215 CSR_WRITE(sc, WMREG_EECD, reg \| EECD_SK); 14249 reg = CSR_READ(sc, WMREG_EECD) & ~(EECD_SK \| EECD_DI); 14260 reg \|= EECD_SK; 14262 reg &= ~EECD_SK; 14413 reg = CSR_READ(sc, WMREG_EECD) & ~(EECD_SK \| EECD_CS); 14442 reg = (CSR_READ(sc, WMREG_EECD) & ~EECD_SK) \| EECD_CS; 15470 eecd \|= EECD_SK; 15483 eecd &= ~EECD_SK;`

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