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    Searched refs:ENABLE_INTR (Results 1 - 17 of 17) sorted by relevancy

  /src/sys/dev/pci/bktr/
bktr_os.h 72 #define ENABLE_INTR(s) splx(s)
bktr_os.c 844 ENABLE_INTR(s);
1306 enable_intr();
bktr_core.c 2488 ENABLE_INTR(s);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si_ih.c 43 ih_cntl |= ENABLE_INTR;
56 ih_cntl &= ~ENABLE_INTR;
amdgpu_cz_ih.c 70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
amdgpu_iceland_ih.c 70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
amdgpu_tonga_ih.c 70 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
87 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0);
amdgpu_navi10_ih.c 55 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
72 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0);
amdgpu_vega10_ih.c 57 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1);
113 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0);
sid.h 673 # define ENABLE_INTR (1 << 0)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 819 # define ENABLE_INTR (1 << 0)
sid.h 669 # define ENABLE_INTR (1 << 0)
evergreend.h 1238 # define ENABLE_INTR (1 << 0)
r600d.h 677 # define ENABLE_INTR (1 << 0)
radeon_r600.c 3631 ih_cntl |= ENABLE_INTR;
3644 ih_cntl &= ~ENABLE_INTR;
radeon_si.c 5932 ih_cntl |= ENABLE_INTR;
5945 ih_cntl &= ~ENABLE_INTR;
radeon_cik.c 6845 ih_cntl |= ENABLE_INTR;
6865 ih_cntl &= ~ENABLE_INTR;

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