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Searched refs:ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (Results 1 - 15 of 15) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
rv770d.h	`647 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
radeon_ni.c	`1303 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 1382 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
radeon_rv770.c	`916 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 993 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
nid.h	`109 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
cikd.h	`494 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
sid.h	`376 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
evergreend.h	`1155 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
r600d.h	`592 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`
radeon_r600.c	`1177 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 1269 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
radeon_evergreen.c	`2416 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 2499 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
radeon_si.c	`4314 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 4400 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
radeon_cik.c	`5468 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \| 5585 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE \|`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gmc_v7_0.c	`650 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1);`
amdgpu_gmc_v8_0.c	`871 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1);`
sid.h	`378 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)`

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