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    Searched refs:ETH_ISR_RCOM (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/arm/at91/
at91emacreg.h 155 #define ETH_ISR_RCOM 0x0002U /* 1 = receive complete */
at91emac.c 215 if (!(imr & (ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
247 if (isr & ETH_ISR_RCOM) { // packet has been received!
467 EMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
705 EMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
  /src/sys/dev/cadence/
cemacreg.h 211 #define ETH_ISR_RCOM __BIT(1) /* 1 = receive complete */
if_cemac.c 263 if (!(imr & (ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE |
312 if (isr & ETH_ISR_RCOM) {
625 CEMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE
1015 CEMAC_WRITE(ETH_IER, ETH_ISR_RCOM | ETH_ISR_TBRE | ETH_ISR_TIDLE

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