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    Searched refs:ETH_RSR_OVR (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/arm/at91/
at91emacreg.h 139 #define ETH_RSR_OVR 0x04U /* 1 = RX overrun */
at91emac.c 156 EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
241 EMAC_WRITE(ETH_RSR, ETH_RSR_OVR); // clear interrupt
342 EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
738 EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
  /src/sys/dev/cadence/
cemacreg.h 195 #define ETH_RSR_OVR __BIT(2) /* 1 = RX overrun */
if_cemac.c 185 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
305 CEMAC_WRITE(ETH_RSR, ETH_RSR_OVR);
461 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));
1069 CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

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