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Searched refs:ETH_TSR_RLE (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/arm/at91/
at91emacreg.h	`133 #define ETH_TSR_RLE 0x04U /* 1 = retry limit exceeded */`
at91emac.c	`153 \| ETH_TSR_IDLE \| ETH_TSR_RLE 339 \| ETH_TSR_IDLE \| ETH_TSR_RLE 735 \| ETH_TSR_IDLE \| ETH_TSR_RLE`
/src/sys/dev/cadence/
cemacreg.h	`188 #define ETH_TSR_RLE __BIT(2) /* 1 = retry limit exceeded */`
if_cemac.c	`182 \| ETH_TSR_IDLE \| ETH_TSR_RLE 466 \| ETH_TSR_IDLE \| ETH_TSR_RLE 1074 \| ETH_TSR_IDLE \| ETH_TSR_RLE`

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