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Searched refs:EVERGREEN_CRTC1_REGISTER_OFFSET (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
evergreen_reg.h	`227 #define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0)`
radeon_display.c	`1503 EVERGREEN_CRTC1_REGISTER_OFFSET, 1835 EVERGREEN_CRTC1_REGISTER_OFFSET); 1837 EVERGREEN_CRTC1_REGISTER_OFFSET);`
radeon_dp_mst.c	`23 EVERGREEN_CRTC1_REGISTER_OFFSET,`
radeon_cik.c	6910 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 6922 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 7262 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2); 7275 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 7328 EVERGREEN_CRTC1_REGISTER_OFFSET); 7346 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, 7353 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); 7355 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK);
radeon_device.c	`708 RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);`
radeon_evergreen_cs.c	`1059 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC1_REGISTER_OFFSET, 1067 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET,`
radeon_atombios_crtc.c	`2257 radeon_crtc->crtc_offset = EVERGREEN_CRTC1_REGISTER_OFFSET;`
radeon_evergreen.c	`123 EVERGREEN_CRTC1_REGISTER_OFFSET,`
radeon_si.c	`156 EVERGREEN_CRTC1_REGISTER_OFFSET,`
/src/sys/dev/pci/
radeonfbreg.h	`4344 #define EVERGREEN_CRTC1_REGISTER_OFFSET (0x79f0 - 0x6df0)`

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