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    Searched refs:EVERGREEN_CRTC4_REGISTER_OFFSET (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
evergreen_reg.h 230 #define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0)
radeon_display.c 1506 EVERGREEN_CRTC4_REGISTER_OFFSET,
1856 EVERGREEN_CRTC4_REGISTER_OFFSET);
1858 EVERGREEN_CRTC4_REGISTER_OFFSET);
radeon_dp_mst.c 26 EVERGREEN_CRTC4_REGISTER_OFFSET,
radeon_cik.c 6916 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
6929 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
7268 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5);
7285 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
7337 EVERGREEN_CRTC4_REGISTER_OFFSET);
7376 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
7382 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);
7384 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK);
radeon_device.c 714 reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) |
radeon_evergreen_cs.c 1062 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC4_REGISTER_OFFSET,
1070 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,
radeon_atombios_crtc.c 2266 radeon_crtc->crtc_offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
radeon_evergreen.c 126 EVERGREEN_CRTC4_REGISTER_OFFSET,
radeon_si.c 159 EVERGREEN_CRTC4_REGISTER_OFFSET,
  /src/sys/dev/pci/
radeonfbreg.h 4347 #define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0)

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