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Searched
refs:EntrySU
(Results
1 - 12
of
12
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGVLIW.cpp
169
releaseSuccessors(&
EntrySU
);
ScheduleDAGSDNodes.cpp
699
if (
EntrySU
.getNode() != nullptr)
700
dumpNodeAll(
EntrySU
);
ScheduleDAGFast.cpp
153
// to be scheduled. Ignore the special
EntrySU
node.
154
if (PredSU->NumSuccsLeft == 0 && PredSU != &
EntrySU
) {
ScheduleDAGRRList.cpp
418
// to be scheduled. Ignore the special
EntrySU
node.
419
if (PredSU->NumSuccsLeft == 0 && PredSU != &
EntrySU
) {
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MacroFusion.cpp
112
if (&FirstSU != &DAG.
EntrySU
) {
ScheduleDAG.cpp
66
EntrySU
= SUnit();
355
if (&SU == &
EntrySU
)
356
dbgs() << "
EntrySU
";
659
// Edges to non-SUnits are allowed but ignored (e.g.
EntrySU
).
ScheduleDAGInstrs.cpp
1176
if (
EntrySU
.getInstr() != nullptr)
1177
dumpNodeAll(
EntrySU
);
1188
if (SU == &
EntrySU
)
PostRASchedulerList.cpp
531
ReleaseSuccessors(&
EntrySU
);
MachineScheduler.cpp
697
if (PredSU->NumSuccsLeft == 0 && PredSU != &
EntrySU
)
870
// Release all DAG roots for scheduling, not including
EntrySU
/ExitSU.
884
releaseSuccessors(&
EntrySU
);
1185
if (
EntrySU
.getInstr() != nullptr)
1186
dumpNodeAll(
EntrySU
);
/src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNMinRegStrategy.cpp
238
releaseSuccessors(&DAG.
EntrySU
, StepNo);
SIMachineScheduler.h
456
SUnit &getEntrySU() { return
EntrySU
; }
/src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ScheduleDAG.h
563
SUnit
EntrySU
; ///< Special node for the region entry.
Completed in 58 milliseconds
Indexes created Wed Sep 23 00:26:21 UTC 2026