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    Searched refs:FCMP (Results 1 - 20 of 20) sorted by relevancy

  /src/external/gpl3/binutils/dist/gas/config/
rx-parse.h 119 FCMP = 320, /* FCMP */
288 #define FCMP 320
rx-parse.y 161 %token FADD FCMP FDIV FMUL FREIT FSUB FSQRT FTOD FTOI FTOU
675 | FCMP { sub_op = 1; } float2_op
1388 OPC(FCMP),
rx-parse.c 301 FCMP = 320, /* FCMP */
470 #define FCMP 320
664 YYSYMBOL_FCMP = 65, /* FCMP */
1326 "EMULU", "FADD", "FCMP", "FDIV", "FMUL", "FREIT", "FSUB", "FSQRT",
4734 OPC(FCMP),
  /src/external/gpl3/binutils.old/dist/gas/config/
rx-parse.h 119 FCMP = 320, /* FCMP */
288 #define FCMP 320
rx-parse.y 161 %token FADD FCMP FDIV FMUL FREIT FSUB FSQRT FTOD FTOI FTOU
675 | FCMP { sub_op = 1; } float2_op
1388 OPC(FCMP),
rx-parse.c 301 FCMP = 320, /* FCMP */
470 #define FCMP 320
664 YYSYMBOL_FCMP = 65, /* FCMP */
1326 "EMULU", "FADD", "FCMP", "FDIV", "FMUL", "FREIT", "FSUB", "FSQRT",
4734 OPC(FCMP),
  /src/sys/arch/sparc/fpu/
fpu.c 356 if (instr.i_op3.i_op3 == IOP3_FPop2 && (opf&0xff0) != (FCMP&0xff0)) {
519 case FCMP >> 2:
520 DPRINTF(FPE_INSN, ("fpu_execute: FCMP\n"));
  /src/sys/arch/m68k/m68k/
db_disasm.h 349 #define FCMP ENCFT(1,1,1,0,0,0)
db_disasm.c 1408 case FCMP:
1409 get_fpustdGEN(dbuf,ext,"fcmp");
  /src/sys/arch/sparc/include/
instr.h 414 #define FCMP 0x50
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.h 58 FCMP,
SystemZISelLowering.cpp 2598 C.Opcode = SystemZISD::FCMP;
5588 OPCODE(FCMP);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsInstructionSelector.cpp 866 // We will move `false` (MIPS::Zero) to gpr result when fcmp gives false
881 MachineInstr *FCMP = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FCMPOpcode))
885 if (!constrainSelectedInstRegOperands(*FCMP, TII, TRI, RBI))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.h 146 FCMP,
AArch64ISelLowering.cpp 1883 MAKE_CASE(AArch64ISD::FCMP)
2422 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS);
2617 /// Emit conjunction or disjunction tree with the CMP/FCMP followed by a chain
6927 // If that fails, we'll need to perform an FCMP + CSEL sequence. Go ahead
10533 // Make v4f16 (only) fcmp operations utilise vector instructions
  /src/sys/external/bsd/sljit/dist/sljit_src/
sljitNativeARM_64.c 86 #define FCMP 0x1e602000
1679 return push_inst(compiler, (FCMP ^ inv_bits) | VN(src1) | VM(src2));
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.h 85 FCMP,
X86ISelDAGToDAG.cpp 5335 case X86ISD::FCMP:
X86ISelLowering.cpp 23498 EFLAGS = DAG.getNode(X86ISD::FCMP, dl, MVT::i32, Op0, Op1);
23595 Opc == X86ISD::FCMP)
24401 DAG.getNode(X86ISD::FCMP, SDLoc(Cond), MVT::i32, LHS, RHS);
24414 SDValue Cmp = DAG.getNode(X86ISD::FCMP, SDLoc(Cond), MVT::i32, LHS, RHS);
24424 SDValue Cmp = DAG.getNode(X86ISD::FCMP, SDLoc(Cond), MVT::i32, LHS, RHS);
25502 SDValue FCmp;
25504 FCmp = DAG.getNode(X86ISD::FSETCCM, dl, MVT::v1i1, LHS, RHS,
25507 FCmp = DAG.getNode(X86ISD::FSETCCM_SAE, dl, MVT::v1i1, LHS, RHS,
25515 FCmp, DAG.getIntPtrConstant(0, dl));
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
LegalizerHelper.cpp 5760 MachineInstrBuilder FCMP =
5762 MIRBuilder.buildSelect(Dst, FCMP, FPTOSI, Res);

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