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    Searched refs:FEXP2 (Results 1 - 19 of 19) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 868 FEXP2,
BasicTTIImpl.h 1538 ISDs.push_back(ISD::FEXP2);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 219 case ISD::FEXP2: return "fexp2";
LegalizeFloatTypes.cpp 85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
1204 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
2231 case ISD::FEXP2:
2595 case ISD::FEXP2:
LegalizeVectorOps.cpp 424 case ISD::FEXP2:
LegalizeVectorTypes.cpp 85 case ISD::FEXP2:
978 case ISD::FEXP2:
3110 case ISD::FEXP2:
LegalizeDAG.cpp 3997 case ISD::FEXP2:
4743 case ISD::FEXP2:
SelectionDAGBuilder.cpp 5312 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op, Flags);
7985 if (visitUnaryFloatCall(I, ISD::FEXP2))
SelectionDAG.cpp 4297 case ISD::FEXP2:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 153 setOperationAction(ISD::FEXP2, MVT::f16, Promote);
390 setOperationAction(ISD::FEXP2, Ty, Legal);
1895 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2)));
3815 // fexp2.w $wd, $ws, $wt
3830 // Emit 1.0 * fexp2(Wt)
3844 // fexp2.d $wd, $ws, $wt
3859 // Emit 1.0 * fexp2(Wt)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUISelLowering.cpp 294 setOperationAction(ISD::FEXP2, MVT::f32, Legal);
468 setOperationAction(ISD::FEXP2, VT, Expand);
2314 return DAG.getNode(ISD::FEXP2, SL, VT, Mul, Op->getFlags());
SIISelLowering.cpp 9373 case ISD::FEXP2:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 867 setOperationAction(ISD::FEXP2, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 211 ISD::FEXP, ISD::FEXP2, ISD::FRINT})
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 373 setOperationAction(ISD::FEXP2, VT, Expand);
848 setOperationAction(ISD::FEXP2, MVT::v2f64, Expand);
869 setOperationAction(ISD::FEXP2, MVT::v4f32, Expand);
885 setOperationAction(ISD::FEXP2, MVT::v2f32, Expand);
1028 setOperationAction(ISD::FEXP2, MVT::f64, Expand);
1474 setOperationAction(ISD::FEXP2, MVT::f16, Promote);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 1490 // ConstantFP, DEBUGTRAP, FCEIL, FCOPYSIGN, FEXP, FEXP2, FFLOOR, FGETSIGN,
1640 ISD::FLOG10, ISD::FEXP, ISD::FEXP2, ISD::FCEIL, ISD::FTRUNC,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 355 setOperationAction(ISD::FEXP2, VT, Expand);
594 setOperationAction(ISD::FEXP2, MVT::f16, Promote);
595 setOperationAction(ISD::FEXP2, MVT::v4f16, Expand);
596 setOperationAction(ISD::FEXP2, MVT::v8f16, Expand);
1371 setOperationAction(ISD::FEXP2, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 799 setOperationAction(ISD::FEXP2, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 796 setOperationAction(ISD::FEXP2, MVT::f80, Expand);
813 setOperationAction(ISD::FEXP2, VT, Expand);
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