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Searched refs:FE_24 (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	112 #define FE_24 (FE_16 + 1) /* FPR starting at position 24 / 114 #define FE_28 (FE_24 + 1) / FPR starting at position 28 / 347 #define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } / e.g. lzxr / 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } / e.g. lxdbr / 351 #define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } / e.g. dxr / 360 #define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } / e.g. cxfbr / 365 #define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } / e.g. iextr / 367 #define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } / e.g. qaxtr / 369 #define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } / e.g. axtra / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr * [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	112 #define FE_24 (FE_16 + 1) /* FPR starting at position 24 / 114 #define FE_28 (FE_24 + 1) / FPR starting at position 28 / 347 #define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } / e.g. lzxr / 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } / e.g. lxdbr / 351 #define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } / e.g. dxr / 360 #define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } / e.g. cxfbr / 365 #define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } / e.g. iextr / 367 #define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } / e.g. qaxtr / 369 #define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } / e.g. axtra / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr * [all...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	112 #define FE_24 (FE_16 + 1) /* FPR starting at position 24 / 114 #define FE_28 (FE_24 + 1) / FPR starting at position 28 / 347 #define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } / e.g. lzxr / 349 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } / e.g. lxdbr / 351 #define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } / e.g. dxr / 360 #define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } / e.g. cxfbr / 365 #define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } / e.g. iextr / 367 #define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } / e.g. qaxtr / 369 #define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } / e.g. axtra / 378 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr * [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	110 #define FE_24 (FE_16 + 1) /* FPR starting at position 24 / 112 #define FE_28 (FE_24 + 1) / FPR starting at position 28 / 357 #define INSTR_RRE_FE0 4, { FE_24,0,0,0,0,0 } / e.g. lzxr / 359 #define INSTR_RRE_FEF 4, { FE_24,F_28,0,0,0,0 } / e.g. lxdbr / 361 #define INSTR_RRE_FEFE 4, { FE_24,FE_28,0,0,0,0 } / e.g. dxr / 370 #define INSTR_RRE_FER 4, { FE_24,R_28,0,0,0,0 } / e.g. cxfbr / 375 #define INSTR_RRF_FE0FER 4, { FE_24,FE_16,R_28,0,0,0 } / e.g. iextr / 377 #define INSTR_RRF_FEUFEFE 4, { FE_24,FE_16,FE_28,U4_20,0,0 } / e.g. qaxtr / 379 #define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } / e.g. axtra / 388 #define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } / e.g. fixbr * [all...]

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