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    Searched refs:FLI (Results 1 - 24 of 24) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/GISel/
PPCCallLowering.cpp 28 FunctionLoweringInfo &FLI,
42 FunctionLoweringInfo &FLI) const {
PPCCallLowering.h 30 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
34 FunctionLoweringInfo &FLI) const override;
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVCallLowering.cpp 26 FunctionLoweringInfo &FLI) const {
40 FunctionLoweringInfo &FLI) const {
RISCVCallLowering.h 32 FunctionLoweringInfo &FLI) const override;
36 FunctionLoweringInfo &FLI) const override;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86CallLowering.h 33 FunctionLoweringInfo &FLI) const override;
37 FunctionLoweringInfo &FLI) const override;
X86CallLowering.cpp 135 FunctionLoweringInfo &FLI) const {
241 FunctionLoweringInfo &FLI) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMCallLowering.h 37 FunctionLoweringInfo &FLI) const override;
41 FunctionLoweringInfo &FLI) const override;
ARMCallLowering.cpp 211 FunctionLoweringInfo &FLI) const {
364 FunctionLoweringInfo &FLI) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.h 37 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
44 FunctionLoweringInfo &FLI) const override;
AArch64CallLowering.cpp 342 FunctionLoweringInfo &FLI,
526 ArrayRef<ArrayRef<Register>> VRegs, FunctionLoweringInfo &FLI) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsCallLowering.h 68 FunctionLoweringInfo &FLI) const override;
72 FunctionLoweringInfo &FLI) const override;
MipsCallLowering.cpp 379 FunctionLoweringInfo &FLI) const {
420 FunctionLoweringInfo &FLI) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCallLowering.h 45 FunctionLoweringInfo &FLI) const override;
52 FunctionLoweringInfo &FLI) const override;
AMDGPUCallLowering.cpp 349 FunctionLoweringInfo &FLI) const {
380 if (!FLI.CanLowerReturn)
381 insertSRetStores(B, Val->getType(), VRegs, FLI.DemoteRegister);
568 FunctionLoweringInfo &FLI) const {
613 if (!FLI.CanLowerReturn)
614 insertSRetIncomingArgument(F, SplitArgs, FLI.DemoteRegister, MRI, DL);
SIISelLowering.h 443 FunctionLoweringInfo *FLI, LegacyDivergenceAnalysis *DA) const override;
SIISelLowering.cpp 11990 const SDNode *N, FunctionLoweringInfo *FLI,
11995 const MachineRegisterInfo &MRI = FLI->MF->getRegInfo();
12003 if (const Value *V = FLI->getValueFromVirtualReg(R->getReg()))
12006 assert(Reg == FLI->DemoteRegister || isCopyFromRegOfInlineAsm(N));
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
CallLowering.h 487 /// \p FLI is required for sret demotion.
494 ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
498 return lowerReturn(MIRBuilder, Val, VRegs, FLI);
507 FunctionLoweringInfo &FLI) const {
522 /// lowering. \p FLI is required for sret demotion.
528 FunctionLoweringInfo &FLI) const {
  /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/CodeView/
ContinuationRecordBuilder.cpp 61 const SegmentInjection *FLI =
65 const uint8_t *FLIB = reinterpret_cast<const uint8_t *>(FLI);
  /src/external/apache2/llvm/dist/llvm/tools/llvm-opt-report/
OptReport.cpp 283 for (auto &FLI : FileInfo)
284 for (auto &FI : FLI.second)
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
InterleavedLoadCombinePass.cpp 1107 BasicBlock::iterator FLI = llvm::find_if(
1109 assert(FLI != BB->end());
1111 return cast<LoadInst>(FLI);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelDAGToDAG.cpp 333 auto FLI = LoadBrevMap.find(IntNo);
334 if (FLI != LoadBrevMap.end()) {
342 FLI->second, dl, RTys,
381 auto FLI = LoadNPcMap.find (IntNo);
382 if (FLI != LoadNPcMap.end()) {
400 MachineSDNode *Res = CurDAG->getMachineNode(FLI->second, DL, RTys, Ops);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
SelectionDAG.h 227 FunctionLoweringInfo * FLI = nullptr;
430 FLI = FuncInfo;
TargetLowering.h 3163 FunctionLoweringInfo *FLI,
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAG.cpp 1167 llvm::shouldOptimizeForSize(FLI->MBB->getBasicBlock(), PSI, BFI);
1962 N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
9169 assert(!TLI->isSDNodeSourceOfDivergence(N, FLI, DA) &&
9173 if (TLI->isSDNodeSourceOfDivergence(N, FLI, DA))
10478 IsDivergent |= TLI->isSDNodeSourceOfDivergence(Node, FLI, DA);

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