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    Searched refs:FMINIMUM (Results 1 - 19 of 19) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 898 /// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
900 /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
901 FMINIMUM,
BasicTTIImpl.h 1562 ISDs.push_back(ISD::FMINIMUM);
TargetLowering.h 2444 case ISD::FMINIMUM:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 190 case ISD::FMINIMUM: return "fminimum";
LegalizeVectorOps.cpp 412 case ISD::FMINIMUM:
LegalizeFloatTypes.cpp 2250 case ISD::FMINIMUM:
2615 case ISD::FMINIMUM:
SelectionDAGBuilder.cpp 3293 case SPNB_RETURNS_NAN: Opc = ISD::FMINIMUM; break;
3298 else if (TLI.isOperationLegalOrCustom(ISD::FMINIMUM, VT))
3299 Opc = ISD::FMINIMUM;
3302 ISD::FMINNUM : ISD::FMINIMUM;
6269 setValue(&I, DAG.getNode(ISD::FMINIMUM, sdl,
LegalizeVectorTypes.cpp 121 case ISD::FMINIMUM:
1019 case ISD::FMINIMUM:
3020 case ISD::FMINIMUM:
DAGCombiner.cpp 1702 case ISD::FMINIMUM: return visitFMINIMUM(N);
14784 bool PropagatesNaN = Opc == ISD::FMINIMUM || Opc == ISD::FMAXIMUM;
14785 bool IsMin = Opc == ISD::FMINNUM || Opc == ISD::FMINIMUM;
SelectionDAG.cpp 4363 case ISD::FMINIMUM:
TargetLowering.cpp 6910 // If the target has FMINIMUM/FMAXIMUM but not FMINNUM/FMAXNUM use that
6914 Node->getOpcode() == ISD::FMINNUM ? ISD::FMINIMUM : ISD::FMAXIMUM;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 746 setOperationAction(ISD::FMINIMUM, VT, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 555 setOperationAction(ISD::FMINIMUM, MVT::f64, Legal);
560 setOperationAction(ISD::FMINIMUM, MVT::v2f64, Legal);
565 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal);
570 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal);
575 setOperationAction(ISD::FMINIMUM, MVT::f128, Legal);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 629 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
693 setOperationAction(ISD::FMINIMUM, Ty, Legal);
711 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal);
1228 setOperationAction(ISD::FMINIMUM, VT, Custom);
1421 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM})
1477 setOperationAction(ISD::FMINIMUM, VT, Custom);
4693 case ISD::FMINIMUM:
13944 return DAG.getNode(ISD::FMINIMUM, SDLoc(N), N->getValueType(0),
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 117 setOperationAction(ISD::FMINIMUM, T, Legal);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1488 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal);
1490 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal);
1493 setOperationAction(ISD::FMINIMUM, MVT::v2f32, Legal);
1495 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal);
1504 setOperationAction(ISD::FMINIMUM, MVT::v4f16, Legal);
1506 setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
3989 ? ISD::FMINIMUM : ISD::FMAXIMUM;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 161 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp 565 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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