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  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineAtomicRMW.cpp 30 case AtomicRMWInst::FSub: // +0.0
67 case AtomicRMWInst::FSub:
InstCombineSelect.cpp 1733 (TI->getOpcode() == Instruction::FSub &&
1739 (FI->getOpcode() == Instruction::FSub &&
2846 // fast-math-flags (nsz) or fsub with +0.0 (not fneg) for this to work. We
2850 // fsub or fneg.
2852 Instruction *FSub;
2855 match(TrueVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &&
2857 Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FalseVal, FSub);
2863 match(FalseVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &
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InstCombineAddSub.cpp 9 // This file implements the visit functions for add, fadd, sub, and fsub.
175 /// FAddCombine is the class for optimizing an unsafe fadd/fsub along
355 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub) {
378 if (Opcode == Instruction::FSub)
436 I->getOpcode() == Instruction::FSub) && "Expect add/sub");
624 // Iterate the addends, creating fadd/fsub using adjacent two addends.
1478 /// Factor a common operand out of fadd/fsub of fmul/fdiv.
1482 I.getOpcode() == Instruction::FSub) && "Expecting fadd/fsub");
2126 /// 'fsub(-0.0, X)' form by combining into a constant operand
    [all...]
InstCombineVectorOps.cpp 1496 case Instruction::FSub:
1561 case Instruction::FSub:
1651 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsOs16.cpp 82 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
Float2Int.cpp 115 case Instruction::FSub: return Instruction::Sub;
215 case Instruction::FSub:
264 case Instruction::FSub:
494 case Instruction::FSub:
LowerAtomic.cpp 93 case AtomicRMWInst::FSub:
SpeculativeExecution.cpp 241 case Instruction::FSub:
Reassociate.cpp 1032 isReassociableOp(V0, Instruction::Sub, Instruction::FSub))
1036 isReassociableOp(V1, Instruction::Sub, Instruction::FSub))
1041 isReassociableOp(VB, Instruction::Sub, Instruction::FSub)))
2088 /// Given an fadd/fsub with an operand that is a one-use instruction
2089 /// (the fadd/fsub), try to change negative floating-point constants into
2095 I->getOpcode() == Instruction::FSub) && "Expected fadd/fsub");
2107 bool IsFSub = I->getOpcode() == Instruction::FSub;
2136 // fadd/fsub.
2152 /// The fadd/fsub opcode may be switched to allow folding a negation into th
    [all...]
GVNSink.cpp 451 case Instruction::FSub:
LowerMatrixIntrinsics.cpp 486 case Instruction::FSub:
1551 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/
Operations.cpp 47 Ops.push_back(binOpDescriptor(1, Instruction::FSub));
112 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
IVDescriptors.cpp 617 case Instruction::FSub:
966 InductionBinOp->getOpcode() == Instruction::FSub))) &&
1017 } else if (BOp->getOpcode() == Instruction::FSub)
CFLGraph.h 571 case Instruction::FSub:
ObjCARCInstKind.cpp 255 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/include/llvm/IR/
Operator.h 388 case Instruction::FSub:
PatternMatch.h 1026 inline BinaryOp_match<LHS, RHS, Instruction::FSub> m_FSub(const LHS &L,
1028 return BinaryOp_match<LHS, RHS, Instruction::FSub>(L, R);
1042 if (FPMO->getOpcode() == Instruction::FSub) {
1048 // Without 'nsz', we need fsub -0.0, X exactly.
1060 /// Match 'fneg X' as 'fsub -0.0, X'.
1067 /// Match 'fneg X' as 'fsub +-0.0, X'.
1069 inline BinaryOp_match<cstfp_pred_ty<is_any_zero_fp>, RHS, Instruction::FSub>
  /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/InstCombine/
InstCombiner.h 337 case Instruction::FSub: // 0.0 - X (doesn't simplify, but it is safe)
  /src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/
ExecutionEngine.cpp 775 case Instruction::FSub:
810 case Instruction::FSub:
825 case Instruction::FSub:
846 case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZTargetTransformInfo.cpp 438 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
513 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub ||
1040 // case Instruction::FSub:
  /src/external/apache2/llvm/dist/llvm/lib/AsmParser/
LLLexer.cpp 866 INSTKEYWORD(sub, Sub); INSTKEYWORD(fsub, FSub);
  /src/external/apache2/llvm/dist/llvm/lib/IR/
Instruction.cpp 340 case FSub: return "fsub";
  /src/external/apache2/llvm/dist/llvm/tools/llvm-stress/
llvm-stress.cpp 396 case 1:{Op = (isFloat?Instruction::FSub : Instruction::Sub); break; }
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGAtomic.cpp 607 PostOp = E->getValueType()->isFloatingType() ? llvm::Instruction::FSub
613 Op = E->getValueType()->isFloatingType() ? llvm::AtomicRMWInst::FSub
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
AtomicExpandPass.cpp 528 case AtomicRMWInst::FSub:
559 // TODO: Handle atomicrmw fadd/fsub
1607 case AtomicRMWInst::FSub:

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