| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFAsmBackend.cpp | 29 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
38 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
61 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
66 if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) {
70 support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4],
73 } else if (Fixup.getKind() == FK_Data_4) {
74 support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian);
75 } else if (Fixup.getKind() == FK_Data_8) {
76 support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| CSKYELFObjectWriter.cpp | 27 const MCFixup &Fixup, bool IsPCRel) const override;
34 const MCFixup &Fixup,
37 switch ((unsigned)Fixup.getKind()) {
39 llvm_unreachable("invalid fixup kind!");
|
| CSKYAsmBackend.cpp | 42 "Not all fixup kinds added to Infos array");
54 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
56 switch (Fixup.getTargetKind()) {
58 llvm_unreachable("Unknown fixup kind!");
68 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.");
70 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned.");
75 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value.")
[all...] |
| CSKYAsmBackend.h | 28 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
35 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRAsmBackend.cpp | 38 std::string Description, const MCFixup &Fixup,
50 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic);
58 std::string Description, const MCFixup &Fixup,
69 Ctx->reportFatalError(Fixup.getLoc(), Diagnostic);
76 /// Adjusts the value of a branch target before fixup application.
77 static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
81 unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx);
87 /// Adjusts the value of a relative branch target before fixup application.
88 static void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup,
92 signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx)
202 static void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value, function in namespace:adjust::ldi
[all...] |
| AVRAsmBackend.h | 34 void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
51 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
60 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMWinCOFFObjectWriter.cpp | 37 const MCFixup &Fixup, bool IsCrossSection,
47 const MCFixup &Fixup,
53 unsigned FixupKind = Fixup.getKind();
56 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
65 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
96 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
97 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
|
| ARMELFObjectWriter.cpp | 30 unsigned GetRelocTypeInner(const MCValue &Target, const MCFixup &Fixup,
39 const MCFixup &Fixup, bool IsPCRel) const override;
69 // Need to examine the Fixup when determining whether to
73 const MCFixup &Fixup,
75 return GetRelocTypeInner(Target, Fixup, IsPCRel, Ctx);
79 const MCFixup &Fixup,
82 unsigned Kind = Fixup.getTargetKind();
88 switch (Fixup.getTargetKind()) {
90 Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol");
95 Ctx.reportError(Fixup.getLoc()
[all...] |
| ARMAsmBackend.h | 44 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
47 unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
52 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
62 const char *reasonForFixupRelaxation(const MCFixup &Fixup,
65 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
|
| ARMMachObjectWriter.cpp | 34 const MCFixup &Fixup,
43 const MCFixup &Fixup, MCValue Target,
57 const MCFixup &Fixup, MCValue Target,
144 const MCFixup &Fixup,
147 uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
150 Asm.getContext().reportError(Fixup.getLoc(),
157 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
164 Asm.getContext().reportError(Fixup.getLoc(),
179 Asm.getContext().reportError(Fixup.getLoc(),
207 switch (Fixup.getTargetKind())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64ELFObjectWriter.cpp | 39 const MCFixup &Fixup, bool IsPCRel) const override;
57 static bool isNonILP32reloc(const MCFixup &Fixup,
60 if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw)
64 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3));
67 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2));
70 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2));
73 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC));
76 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1));
79 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC));
82 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2))
[all...] |
| AArch64WinCOFFObjectWriter.cpp | 38 const MCFixup &Fixup, bool IsCrossSection,
47 MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup,
49 unsigned FixupKind = Fixup.getKind();
52 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
60 const MCExpr *Expr = Fixup.getValue();
70 Ctx.reportError(Fixup.getLoc(), "relocation variant " +
80 Ctx.reportError(Fixup.getLoc(), "relocation type " +
84 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
85 Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name +
153 bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const
[all...] |
| AArch64MachObjectWriter.cpp | 35 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
45 const MCFixup &Fixup, MCValue Target,
52 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym,
57 switch (Fixup.getTargetKind()) {
102 Asm.getContext().reportError(Fixup.getLoc(),
153 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
155 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
163 unsigned Kind = Fixup.getKind();
166 FixupOffset += Fixup.getOffset();
182 Asm.getContext().reportError(Fixup.getLoc()
[all...] |
| AArch64AsmBackend.cpp | 72 // Fixup kinds from .reloc directive are like R_AARCH64_NONE. They do not
85 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
90 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
99 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
105 /// The number of bytes the fixup may change.
109 llvm_unreachable("Unknown fixup kind!");
149 static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
153 switch (Fixup.getTargetKind()) {
155 llvm_unreachable("Unknown fixup kind!");
158 Ctx.reportError(Fixup.getLoc(), "fixup value out of range")
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| MCFixup.h | 20 /// Extensible enumeration to represent the type of a fixup.
22 FK_NONE = 0, ///< A no-op fixup.
23 FK_Data_1, ///< A one-byte fixup.
24 FK_Data_2, ///< A two-byte fixup.
25 FK_Data_4, ///< A four-byte fixup.
26 FK_Data_8, ///< A eight-byte fixup.
27 FK_Data_6b, ///< A six-bits fixup.
28 FK_PCRel_1, ///< A one-byte pc relative fixup.
29 FK_PCRel_2, ///< A two-byte pc relative fixup.
30 FK_PCRel_4, ///< A four-byte pc relative fixup
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430AsmBackend.cpp | 32 uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
50 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
56 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
85 "Not all fixup kinds added to Infos array");
96 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup,
99 unsigned Kind = Fixup.getKind();
103 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");
113 Ctx.reportError(Fixup.getLoc(), "fixup value out of range")
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| X86WinCOFFObjectWriter.cpp | 30 const MCFixup &Fixup, bool IsCrossSection,
42 const MCFixup &Fixup,
45 unsigned FixupKind = Fixup.getKind();
48 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
81 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
103 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type");
|
| X86MachObjectWriter.cpp | 31 const MCFixup &Fixup,
39 const MCFixup &Fixup,
47 const MCFixup &Fixup,
52 const MCFragment *Fragment, const MCFixup &Fixup,
61 const MCFixup &Fixup, MCValue Target,
64 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
67 RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
83 llvm_unreachable("invalid fixup kind!");
104 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
106 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUELFObjectWriter.cpp | 26 const MCFixup &Fixup, bool IsPCRel) const override;
41 const MCFixup &Fixup,
68 switch (Fixup.getKind()) {
79 if (Fixup.getTargetKind() == AMDGPU::fixup_si_sopp_br) {
83 Ctx.reportError(Fixup.getLoc(),
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| WebAssemblyAsmBackend.cpp | 47 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
56 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
95 const MCFixup &Fixup,
100 const MCFixupKindInfo &Info = getFixupKindInfo(Fixup.getKind());
110 unsigned Offset = Fixup.getOffset();
111 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
113 // For each byte of the fragment that the fixup touches, mask in the
114 // bits from the fixup value.
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiMCExpr.cpp | 51 const MCFixup *Fixup) const {
52 if (!getSubExpr()->evaluateAsRelocatable(Res, Layout, Fixup))
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
| RISCVELFObjectWriter.cpp | 38 const MCFixup &Fixup, bool IsPCRel) const override;
50 const MCFixup &Fixup,
52 const MCExpr *Expr = Fixup.getValue();
54 unsigned Kind = Fixup.getTargetKind();
60 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type");
94 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type");
97 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported");
100 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported");
|
| RISCVAsmBackend.cpp | 75 "Not all fixup kinds added to Infos array");
77 // Fixup kinds from .reloc directive are like R_RISCV_NONE. They
91 // enabled, always emit relocations even if the fixup can be resolved. This is
94 const MCFixup &Fixup,
96 if (Fixup.getKind() >= FirstLiteralRelocationKind)
98 switch (Fixup.getTargetKind()) {
117 bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
131 switch (Fixup.getTargetKind()) {
221 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
223 switch (Fixup.getTargetKind())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcELFObjectWriter.cpp | 33 const MCFixup &Fixup, bool IsPCRel) const override;
43 const MCFixup &Fixup,
46 if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) {
52 switch(Fixup.getTargetKind()) {
54 llvm_unreachable("Unimplemented fixup -> relocation");
68 switch(Fixup.getTargetKind()) {
70 llvm_unreachable("Unimplemented fixup -> relocation");
72 case FK_Data_2: return ((Fixup.getOffset() % 2)
75 case FK_Data_4: return ((Fixup.getOffset() % 4)
78 case FK_Data_8: return ((Fixup.getOffset() % 8
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| VEAsmBackend.cpp | 26 llvm_unreachable("Unknown fixup kind!");
56 /// getFixupKindNumBytes - The number of bytes the fixup may change.
60 llvm_unreachable("Unknown fixup kind!");
130 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
132 switch ((VE::Fixups)Fixup.getKind()) {
152 /// fixup requires the associated instruction to be relaxed.
153 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
186 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
190 Value = adjustFixupValue(Fixup.getKind(), Value);
194 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind())
[all...] |
