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    Searched refs:G4X_WM_LEVEL_HPLL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 1074 dev_priv->wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35;
1076 dev_priv->wm.max_level = G4X_WM_LEVEL_HPLL;
1113 case G4X_WM_LEVEL_HPLL:
1283 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]);
1289 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc);
1334 if (level <= G4X_WM_LEVEL_HPLL) {
1392 level = G4X_WM_LEVEL_HPLL;
1424 else if (level >= G4X_WM_LEVEL_HPLL &&
1425 wm_state->hpll.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_HPLL))
1486 g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_HPLL) ||
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display_types.h 705 G4X_WM_LEVEL_HPLL,

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