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Searched refs:GENMO_RD__VGA_HSYNC_POL_MASK (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	`7157 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x00000040L`
dce_8_0_sh_mask.h	`10627 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40`
dce_10_0_sh_mask.h	`11011 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40 [all...]`
dce_11_0_sh_mask.h	`10823 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40 [all...]`
dce_11_2_sh_mask.h	`12077 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40 [all...]`
dce_12_0_sh_mask.h	`2257 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40L [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_sh_mask.h	`896 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40L [all...]`
dcn_2_0_0_sh_mask.h	`307 #define GENMO_RD__VGA_HSYNC_POL_MASK 0x40L [all...]`

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