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    Searched refs:GPCPLL_CFG2 (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/
gk20a.h	43 #define GPCPLL_CFG2 (SYS_GPCPLL_CFG_BASE + 0xc)
nouveau_nvkm_subdev_clk_gm20b.c	172 val = nvkm_rd32(device, GPCPLL_CFG2); 182 nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_MASK, 295 nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_NEW_MASK, 314 nvkm_mask(device, GPCPLL_CFG2, GPCPLL_CFG2_SDM_DIN_MASK,
nouveau_nvkm_subdev_clk_gk20a.c	539 nvkm_mask(device, GPCPLL_CFG2, 0xff << GPCPLL_CFG2_PLL_STEPA_SHIFT,

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