| /src/sys/arch/hpcarm/dev/ |
| H A D | ipaq_gpioreg.h | 58 Extended GPIO 78 #define GPIO_H3600_POWER_BUTTON GPIO (0) 79 #define GPIO_H3600_CLK_SET0 GPIO (12) 80 #define GPIO_H3600_CLK_SET1 GPIO (13) 81 #define GPIO_H3600_PCMCIA_CD0 GPIO (17) 82 #define GPIO_H3600_PCMCIA_CD1 GPIO (10) 83 #define GPIO_H3600_PCMCIA_IRQ0 GPIO (21) 84 #define GPIO_H3600_PCMCIA_IRQ1 GPIO (11) 85 #define GPIO_H3600_L3_DATA GPIO (14) 86 #define GPIO_H3600_L3_MODE GPIO (1 [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/bitmain/ |
| H A D | bm1880-sophon-edge.dts | 12 * GPIO name legend: proper name = the GPIO line is used as GPIO 15 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 30 * are the only ones actually used for GPIO. 56 "GPIO-A", /* GPIO0, LSEC pin 23 */ 57 "GPIO [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi3798cv200-poplar.dts | 108 gpio-line-names = "GPIO-E", "", 110 "", "GPIO-F", 111 "", "GPIO-J"; 116 gpio-line-names = "GPIO-H", "GPIO-I", 117 "GPIO-L", "GPIO-G", 118 "GPIO-K", "", 126 "GPIO-C", "", 127 "", "GPIO [all...] |
| H A D | hi3670-hikey970.dts | 59 * Legend: proper name = the GPIO line is used as GPIO 62 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 79 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 80 * ones actually used for GPIO. 103 "GPIO-I", /* LSEC pin 31: GPIO_013_CAM0_RST_N */ 111 "GPIO-G", /* LSEC pin 29: GPIO_016_LCD_TE0 */ 129 "GPIO [all...] |
| H A D | hi6220-hikey.dts | 117 /* WLAN_EN GPIO */ 348 * Legend: proper name = the GPIO line is used as GPIO 350 * "[PER]" = pin is muxed for peripheral (not GPIO) 368 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 369 * ones actually used for GPIO. 384 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 385 "GPIO [all...] |
| /src/sys/arch/arm/sa11x0/ |
| H A D | sa11x0_gpioreg.h | 32 * SA-11x0 GPIO Register 37 /* GPIO pin-level register */ 40 /* GPIO pin direction register */ 43 /* GPIO pin output set register */ 46 /* GPIO pin output clear register */ 49 /* GPIO rising-edge detect register */ 52 /* GPIO falling-edge detect register */ 55 /* GPIO edge-detect status register */ 58 /* GPIO alternate function register */ 62 #define GPIO( macro [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620-hi4511.dts | 71 0x008 0x0 /* GPIO -- eFUSE_DOUT */ 95 0x0f8 0x1 /* GPIO (IOMG61) */ 96 0x0fc 0x1 /* GPIO (IOMG62) */ 107 0x104 0x1 /* GPIO (IOMG96) */ 108 0x108 0x1 /* GPIO (IOMG64) */ 119 0x160 0x1 /* GPIO (IOMG85) */ 120 0x164 0x1 /* GPIO (IOMG86) */ 132 0x168 0x1 /* GPIO (IOMG87) */ 133 0x16c 0x1 /* GPIO (IOMG88) */ 134 0x170 0x1 /* GPIO (IOMG9 [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-dhcom-pdk2.dts | 30 enable-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; /* GPIO G */ 39 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* GPIO A */ 40 label = "TA1-GPIO-A"; 46 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; /* GPIO B */ 47 label = "TA2-GPIO-B"; 53 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ 54 label = "TA3-GPIO-C"; 60 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; /* GPIO D */ 61 label = "TA4-GPIO-D"; 71 * Disable PDK2 LED5, because GPIO [all...] |
| H A D | imx6qdl-dhcom-pdk2.dtsi | 27 enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */ 63 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */ 64 label = "TA1-GPIO-A"; 72 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */ 73 label = "TA2-GPIO-B"; 81 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */ 82 label = "TA3-GPIO-C"; 90 gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */ 91 label = "TA4-GPIO-D"; 103 * Disable led-5, because GPIO [all...] |
| H A D | imx6qdl-dhcom-drc02.dtsi | 26 * GPIO line, however the i.MX6 UART driver assumes RX happens 32 gpios = <18 0>; /* GPIO Q */ 74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts. 77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */ 80 rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ 86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property 87 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via 88 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1 95 rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO [all...] |
| H A D | imx6dl-prtvt7.dts | 66 label = "GPIO Key ESC"; 72 label = "GPIO Key UP"; 78 label = "GPIO Key DOWN"; 84 label = "GPIO Key Enter"; 90 label = "GPIO Key CYCLE"; 96 label = "GPIO Key F1"; 102 label = "GPIO Key F2"; 108 label = "GPIO Key F3"; 114 label = "GPIO Key F4"; 120 label = "GPIO Ke [all...] |
| H A D | imx6qdl-solidsense.dtsi | 101 /* Nordic Chip 1 SWDIO - GPIO 125 */ 103 /* Nordic Chip 1 SWDCLK - GPIO 59 */ 106 /* Nordic Chip 2 SWDIO - GPIO 81 */ 108 /* Nordic Chip 2 SWCLK - GPIO 82 */ 115 /* Red LED 1 - GPIO 58 */ 117 /* Green LED 1 - GPIO 55 */ 119 /* Red LED 2 - GPIO 57 */ 121 /* Green LED 2 - GPIO 56 */
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/nxp/mxs/ |
| H A D | imx28-duckbill-2-spi.dts | 33 MX28_PAD_LCD_D14__GPIO_1_14 /* GPIO 0 */ 34 MX28_PAD_LCD_D15__GPIO_1_15 /* GPIO 1 */ 35 MX28_PAD_LCD_D18__GPIO_1_18 /* GPIO 2 */ 36 MX28_PAD_LCD_D21__GPIO_1_21 /* GPIO 3 */
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_cyclone5_mcvevk.dts | 35 &gpio0 { /* GPIO 0 ... 28 */ 39 &gpio1 { /* GPIO 29 ... 57 */ 43 &gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */ 58 irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| H A D | qrb5165-rb5.dts | 1154 "GPIO-MM", 1155 "GPIO-NN", 1156 "GPIO-OO", 1157 "GPIO-PP", 1158 "GPIO-A", 1159 "GPIO-C", 1160 "GPIO-E", 1161 "GPIO-D", 1164 "GPIO-TT", /* GPIO_10 */ 1168 "GPIO [all...] |
| H A D | msm8916-samsung-j3-common.dtsi | 44 /* GPIO pins vary depending on model variant */ 48 /* GPIO pins vary depending on model variant */
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| H A D | apq8016-sbc.dts | 446 * GPIO name legend: proper name = the GPIO line is used as GPIO 449 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 465 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 466 * ones actually used for GPIO. 483 "GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */ 484 "GPIO [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-dhcom-pdk2.dts | 36 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ 37 label = "TA1-GPIO-A"; 45 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ 46 label = "TA2-GPIO-B"; 54 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ 55 label = "TA3-GPIO-C"; 63 gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */ 64 label = "TA4-GPIO-D"; 91 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */ 100 gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/actions/ |
| H A D | s900-bubblegum-96.dts | 68 * GPIO name legend: proper name = the GPIO line is used as GPIO 71 * "[PER]" = pin is muxed for [peripheral] (not GPIO) 88 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 89 * are the only ones actually used for GPIO. 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO [all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-friendlyelec-cm3588-nas.dts | 228 /* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */ 371 /* GPIO Connector, connected to 40-pin GPIO header */ 512 /* GPIO Connector, connected to 40-pin GPIO header */ 520 /* GPIO Connector, connected to 40-pin GPIO header */ 534 /* GPIO Connector, connected to 40-pin GPIO header */ 541 /* GPIO Connecto [all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/ |
| H A D | Makefile | 24 # It provides the control and status of HW GPIO pins. 26 GPIO = gpio_base.o gpio_service.o hw_factory.o \ macro 29 AMD_DAL_GPIO = $(addprefix $(AMDDALPATH)/dc/gpio/,$(GPIO))
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/apple/ |
| H A D | t600x-gpio-pins.dtsi | 3 * GPIO pin mappings for Apple T600x SoCs.
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-overo-tobiduo-common.dtsi | 18 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; /* GPIO 176 */ 53 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* GPIO 65 */
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| H A D | omap3-panel-sharp-ls037v7dw01.dtsi | 6 * at minimum the GPIO enable-gpios for display, and 20 /* 3.3V GPIO controlled regulator for LCD_ENVDD */
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/st/ |
| H A D | stm32mp15xx-dhcom-pdk2.dtsi | 32 * so mark this as polled GPIO key. 35 label = "TA1-GPIO-A"; 42 * so mark this as polled GPIO key. 45 label = "TA2-GPIO-B"; 52 * so mark this as polled GPIO key. 55 label = "TA3-GPIO-C"; 65 label = "TA4-GPIO-D"; 199 interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
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